Interrupt Latency Calculator

Calculate the total interrupt response latency from detection to start of ISR execution.

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MHz

Cycles to synchronize the interrupt signal

Push registers to stack

Interrupt Latency

277.8 ns

Interrupt Latency0.278 µs
Total Latency Cycles20
Max Interrupt Rate (100% CPU)3,600,000 Hz

Interrupt Latency vs CPU Clock

View formula & how it works →

Understanding Interrupt Latency

Interrupt latency is the delay from when an interrupt occurs to when the ISR begins executing.

Components

Total Cycles = Sync + Pipeline Flush + Context Save + Vector Fetch

Latency (ns) = Total Cycles / Clock Frequency x 10^9

Breakdown

  • Synchronization: Aligning the async interrupt to the clock
  • Pipeline flush: Discarding partially executed instructions
  • Context save: Pushing registers onto the stack
  • Vector fetch: Reading the ISR address from the vector table

    • ARM Cortex-M3/M4 processors achieve 12 cycles total. Simpler 8-bit MCUs may take 4-6 cycles.

    Example Calculation

    72 MHz ARM Cortex-M: 2 sync, 3 pipeline, 12 context save, 3 vector fetch.

    1. 01Total cycles: 2 + 3 + 12 + 3 = 20
    2. 02Latency: 20 / 72e6 x 1e9 = 277.8 ns
    3. 03Max interrupt rate: 72e6 / 20 = 3,600,000 Hz

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